Translating network models to parallel hardware in NEURON (Hines and Carnevale 2008)


Shows how to move a working network model written in NEURON from a serial processor to a parallel machine in such a way that the final result will produce numerically identical results on either serial or parallel hardware.

Model Type: Realistic Network

Model Concept(s): Simplified Models; Methods

Simulation Environment: NEURON

Implementer(s): Carnevale, Ted [Ted.Carnevale at Yale.edu]; Hines, Michael [Michael.Hines at Yale.edu]

References:

Hines ML, Carnevale NT. (2008). Translating network models to parallel hardware in NEURON. Journal of neuroscience methods. 169 [PubMed]


This website requires cookies and limited processing of your personal data in order to function. By continuing to browse or otherwise use this site, you are agreeing to this use. See our Privacy policy and how to cite and terms of use.